technology on ASIC Design Verification including Formal property checking, Simulation, Metric-driven Verification sign-off..., Advanced CPU and communications at advanced technology nodes. The role will be based in the Cambridge area with hybrid working...
Cadence Design SystemsCPU, GPU, ML and systems IP, some years before they appear in mainstream products. This candidate will also contribute..., test pattern development, scan compression, Memory BIST, Logic BIST, JTAG, IJTAG, fault simulation, debug, verification...
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